Excuse me for cutting in, would this involve remaking the actual Sid circuit or its behaviour? Im new to FPGA and would like to learn techniques of emualting behaviour of chips especially the Sid, its just the complexity of its hardware is mind boggling, there are decaps of the 6581 and 8580 Sid its enourmous where would one start? On Mon, Aug 31, 2020 at 4:22 AM smf <smf_at_null.net> wrote: > On 29/08/2020 19:29, Gerrit Heitsch wrote: > > > A 6502 works better if you have some RAM for zeropage and stack. > > > My thought on using a 6502 + 6522 would be that you'd have the write to > the 6522 parallel port wake up the 6502 and it would then just plug > values into the timer to generate a square wave. > > You could do this without any ram at all, only rom & that might be > enough weirdness to make it interesting. > > Otherwise I'd just stick with an arm soc. > > > >Received on 2020-09-01 19:00:03
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