In a C64, the VIC-II controls the CPU, giving it the clock and stopping it through RDY and AEC pins. In a C64, the VIC-II receives two clock ticks. A "COLOR CLOCK" for the video color generation, and a "DOT CLOCK" for its internal workings, where it gets divided for external CPU clocking. A 8701 chip gets those clock given to the VIC-II. What about this? Put a clock in a board of double the rate a 8701 needs to be fed with (double of 14.31818 or 17.734472 Mhz). Make the clock send: one tick to the 8701, and the other one to a 65c02/816 chip, so both the chips would receive its intended tick one each following the other, alternately. The VIC-II would behave as always, and the 65c02/816 would too. Both of them would be able to access the RAM never at the same time, because their clocks would never overlap. But maybe that wouldn't stop the VIC-II to need being able to stop the CPU to gets its reads during badlines, sprites and so. Also, the VIC-II wouldn't be able to stand access for read or write to its registers at such a high speed from the CPU (although the datasheet does not list a "minimal" time for that - or I can't read a dataheet). What do you think? -- Sent from: http://cbm-hackers.2304266.n4.nabble.com/Received on 2020-08-05 04:00:03
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