RE: C128 'VIC tower' mod board

From: Jeffrey Birt <birt_j_at_soigeneris.com>
Date: Thu, 23 Jul 2020 14:30:23 -0500
Message-ID: <00e701d66127$b648a000$22d9e000$_at_soigeneris.com>
I think the VIC tower mystery is solved!

Both C128s I was referencing use Matsushita DRAM chips. I just found the exact data sheet for them and the part number does reflect access time.

I was looking at the data form the LA again and could not see any significant benefit to the /RAS rising edge being pushed back on READ cycles. I think noticed that the effect on WRITE cycles was more pronounced.

The first thing I noticed that is that on WRITE cycles the normal /RAS falling edge occurs after /WE falls. This turns out to be not important though. Since the trailing edge of /RAS is pushed back this changes the relationship between when /CAS falls and /RAS rises, called tRSH in the datasheet. For the 150ns parts tRSH has a min rating of 100ns and for the 150ns parts the min rating is 135ns.

The measured tRSH with the normal /RAS was 83ns. With the modified /RAS (/RAS_FF) it is 125ns. Even given the limitations of my LA speed the 83ns time would be pushing it on the 150ns parts and is too fast for the 200ns parts. The modified /RAS (/RAS_FF) is stretched out just enough to make it work.

A screen shot of the measurement of the /RAS_FF tRSH is linked below.

https://1drv.ms/u/s!AtH4vpaZnzX7kv4rLGXlwaI6i7p9WQ?e=DJEZB2

Jeff Birt

-----Original Message-----
From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de> 
Sent: Monday, July 20, 2020 11:30 AM
To: cbm-hackers_at_musoftware.de
Subject: Re: C128 'VIC tower' mod board

On 7/20/20 5:58 PM, marko.makela_at_iki.fi wrote:
> On Sun, Jul 19, 2020 at 08:58:15PM +0200, Gerrit Heitsch wrote:
>> I have never seen any 64Kx1 DRAM slower than 200ns though.
> 
> My oldest PAL C64 is equipped with 350ns DRAM chips and a VIC-II in 
> ceramic case. So, they do exist.

Please check tha datasheet for that RAM. It's likely that they printed the RAS cycle time on the RAM instead of the RAS access time. The former is the whole cycle including RAS precharge time. Hitachi and NEC did that for a while, the chips had a '-3' printed on the case. They still had a 200ns RAS access time though.


DRAM with 350 ns RAS access time would be too slow, together with the RAS precharge time it would be more than 500ns.

I do have a few C64 with VIC in ceramic, all 6569R1 come this way, they ran too hot for plastic. You can also find the 6569R3 in ceramic.




>> Maybe they thought they need it but then found out they don't and 
>> omitted the circuit on the newer revision? I mean the 250466 board for 
>> the C64 has an unused place U11 for a 74LS139 next to the RAMs. It 
>> will work fine with U11 populated and J3 cut or U11 empty and J3 
>> closed. If I remember right, the purpose of U11 is to make R/W go HIGH 
>> as soon as PHI0 goes down.
> 
> Should I check it on that board?

On the 250466? I did that, it makes no difference. But if you have the 
newer C128, you could check if the '74 is really gone or if they 
integrated it on the board.

  Gerrit
Received on 2020-07-23 22:00:03

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