Hi! On Mon, May 04, 2020 at 12:38:02PM -0500, Jim Brain wrote: > On 5/4/2020 11:09 AM, Ruud_at_Baltissen.org wrote: > >But what is so "dynamic" on the 6502? AFAIK it doesn't use > >capacitors like a DRAM. Better AFAIK it only uses transistors, > >something that has been proofed by this guy that built a 100% > >compatible 6502 using only transistors. > > MOS transistors have a capacitance. In fact, the designer of the > Monster 6502 (the project you noted), talks about it: > > "No; it's relatively slow. The MOnSter 6502 runs at about 1/20th the > speed of the original, thanks to the much larger capacitance of the > design. The maximum reliable clock rate is around 50 kHz. The primary > limit to the clock speed is the gate capacitance of the MOSFETs that we > are using, which is much larger than the capacitance of the MOSFETs on > an original 6502 die." On several-micron silicon-gate processes (like what the 6502 uses), the only "big" capacitance is the gate capacitance. > The original NMOS design relies on the fact that the charge on a wire > will continue to live there for 300nS or so, as part of the operation of > the 6502. The charge on the gates. Yup. > On the 65C02, such things were dumped into flops, to avoid > the issue. It also saves like half of the total area, it's not just an "issue", it has advantages as well, it's a conscious design choice :-) On CMOS this area advantage is less pronounced. SegherReceived on 2020-05-30 01:39:17
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