From: Robin Harbron (
Date: 2000-09-26 04:01:11

"COPLIN, Nicholas." wrote:
> One very simple question though... what is VHDL?

I found this on the net about VHDL, and I'm just starting
to read up on it:

Perhaps some of the more knowledgeable folks on this list
can offer some good sites to visit?

Dave Ross had a nice, simple explanation that he posted in
another mailing list just today:

"Dave R." wrote:
> At Tim Lewis's request, a brief little blurb about what VHDL is before I
> fly out the door...
> Digital circuits consist primarily of gates.  You have AND gates, OR gates,
> XOR gates, XAND gates, NOT gates, etc. etc. etc.  Through these gates and
> combinations of them, one is able to create binary output from binary
> input.  You can get chips with multiple gates per chip, but you still need
> a bunch of chips to do any sort of complex logic.
> Picture a chip...well, Greg & I were looking at the most advanced chip
> Aldec makes....picture a chip with a million generic "gates" that could be
> "programmed" to be AND gates, OR gates, etc.  Instead of a board filled
> with lots of little 54xx and 74xx logic chips, you just have one
> medium-sized chip on it.
> Now, you could write out a file containing a map of which gate goes where
> and does what, but that would be way too burdensome when you're dealing
> with a quantity like that.  Enter "Hardware Description Languages" such as
> Verilog and VHDL.  These allow you to essentially define a piece a piece of
> hardware in software (being a programmer, this is a marvelous idea to
> me).  The software gets compiled and run through a bunch of optimizers,
> including one to make the most effective use of space on the chip (there
> are some limiting factors) and the end result is a chip (a PAL, PGA, FPGA,
> PLD, CPLD, etc).
> And once you have the design in an HDL format, the only major limitation is
> the size and speed of the blank chips that you can get.  So if someone
> makes a chip a few years down the line that can run this hypothetical
> 64-on-a-chip at 1ghz, it's just a matter of getting the chip definitions
> for your development environment and recompiling your HDL source
> again.  Want to add a feature?   Edit the existing code.  Want a 64-bit
> address bus for the 6502?  Change "(7 down to 0)" to "(63 down to 0)" and
> tweak the rest of the code to be able to use it.  The sky, and how many
> gates can be put on a chip, is the limit.
>    :::::      Dave Ross / Dr. Watson          "Yesterday's technology
> ::    ===              today...for a better
> ::    ===                                    tomorrow!"
>    :::::
Robin Harbron
This message was sent through the cbm-hackers mailing list.
To unsubscribe: echo unsubscribe | mail

Archive generated by hypermail 2.1.1.