PET 4040 disk drives

From: Bruce Phipps (brucep_at_knightlore.freeserve.co.uk)
Date: 2000-09-13 15:25:24

Hi all,

I've only just joined this mailing list so apologies if these questions have been asked before.

I've been looking at the schematics for a PET 4040 disk drive and wondering if anyone can give me some advice on the following..!

The drive uses 2 processors - a 6502 which I assume handles the DOS, and also a 6504. What does this one do?

It looks as though the CPUs share a common 4K RAM buffer, and as I can't see any other signal control lines, I guess there must be some kind of handshake protocol that's used to communicate between the two. ie. certain byte values are stored in certain memory locations, to instruct whichever processor to carry out a task. Is this the way it works? If it is, does anyone know what byte codes do what?

There are a lot of signal name abbreviations in the schematics, which I don't quite understand. 6522 VIA device UM3 has port I/O lines described as SIA, SIB, SOA, SOB, MODE SEL, ERR (for 'error' I guess, but what type?) & READY. Likewise, 6530 RIOT device UK3 has port I/O lines for WPS, SYNC, DS0 & DS1 - what do all these do?

The 2 disk drive units themselves, I've read somewhere, are Shugart 390 types. How are these different from Shugart 400?

Is there any info anywhere on what the internal buffer/driver arrangement is for a long-since-obselete MC3446 IEEE-488 interface IC? Is there a site anywhere that covers what the IEEE-488 protocol is/how it works?

Thanks & regards

Bruce Phipps


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