Re: GO64 tech stuff?

From: Nicolas Welte (
Date: 2000-08-25 11:19:24

Marko Mäkelä wrote:
> On Fri, 25 Aug 2000, Richard Atkinson wrote:
> > I'm most intrigued. Perhaps there are hidden registers, something like the
> > plus/4s TED registers.
> My bet is that it's the "test mode" bit of the $d030 register (or was it
> $d02f)?  That bit normally disables all VIC-IIe interrupts and blanks the

You won the bet :-) But I'm also not sure if it's d02f or d030, I always

Anyway, it would be very interesting to know more about that test bit. I am
not sure if the RAM refresh is corrupted if the test bit is set, because
raster lines are skipped completely, so the refresh counter probably also
gets affected.

There's also some difference in behaviour between PAL and NTSC chips, the
NTSC 8564 somehow shows a ghost picture shifted 20 characters to the right
if the test bit is activated in the end of the lower border. I think the
ghost picture is only present in every second frame, but I don't know. I
tested this on a 8564R4 and a 8564R6, so I don't think it is a problem of
an old chip revision.

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