Re: Border artefact colour source

From: Michiel Boland <michiel_at_boland.org>
Date: Sat, 8 Feb 2020 22:26:39 +0100
Message-ID: <1dccc977-75fc-4864-0087-8bbfad3e72f7_at_boland.org>
On 2/8/20 7:40 PM, silverdr_at_wfmh.org.pl wrote:
> 
> 
>> On 2020-02-08, at 14:22, Michiel Boland <michiel_at_boland.org> wrote:
>>
>>> Under the lower (and upper) border, the VICs data sequencer is stuck at the last byte of the selected video ram bank ($3fff for default bank 0). That's where the bitmap data comes from. Does anyone know/remember where its colour information comes from? Or is it always $x0 as "unconnected"?
>>
>> The color of a pixel is determined by either the value of some color register (any of $d020-$d02e) or some selection from the 40x12bit cache. There are 40 word lines connected to the cache that get activated in sequence during normal display (see my previous ramblings about this in the archive).
> 
> Do you remember what was the subject line?

I believe it was "VIC-II cache corruption" (2019-10-19)

> 
>> Outside of the display (in normal operation, between lines 251 and 51) the word lines are not activated, so the bit in the chip that reads the color bits from the cache reads all zeroes, i.e. black color.
> 
> Where does it read those zeroes from? The internal VIC cache? It does fetch the content of the last byte in the bank and as it reads 12 bits, it gets all zeroes, so I tend to believe that those bits are "unconnected" when outside of regular screen, right?
> 

I'm not an expert but I believe it works something like this.
Each bit has two lines connected to it: one for the normal and one for the 
inverse value. When the chip wants to read the bit it pulls both lines to 5V 
(otherwise it would destroy the contents of the bit) and then senses the value 
of the inverse line (I guess since NMOS is better at pulling to 0V.) This is 
then inverted again.
So if nothing is pulling the bit lines low the chip will read a 0.

Cheers
Michiel
Received on 2020-05-30 00:55:04

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