> On 2019-12-06, at 20:41, Frank Wolf <webmaster_at_frank-wolf.org> wrote: > > No that's not correct. The 6510 already had 8 bits of which only 6 were bonded. > > I also did a side-by-side comparison of the 8500<->6510 some time ago and they are 100% identical > > apart from the outer perimeter were the buffers/drivers reside. Would that explain what Gideon experienced some time ago: "It was attempted to pull –DMA low around 250 ns before the falling edge of PHI2, so after the R/–W line had stabilized. This works perfectly on a 6510, but makes the 850x CPU in a C64c crash. Apparently, this CPU does not like to see RDY ‘true’ on a rising edge of PHI2, and ‘false’ on the subsequent falling edge." ? -- SD!Received on 2020-05-29 23:55:43
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