Re: In search of bad 4164, 41256 DRAM

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Tue, 17 Sep 2019 10:32:07 +0200
Message-ID: <00fe80a8-ab40-d126-97d1-4d3c3344bec5_at_laosinh.s.bawue.de>
On 9/16/19 11:44 PM, smf wrote:
> On 14/09/2019 17:57, Gerrit Heitsch wrote:
>> Also, back then, an empty DRAM cell didn't necessarily read as '0' to 
>> the outside. Take a look at the memory of a system that does not clear 
>> the RAM after power on. You'll notice a pattern that varies between 
>> manufacturers.
>>
>> So, just writing a '1' and then waiting for it to fade to '0' if you 
>> stop refreshing will not work on all cells.
>>
> There is some interesting research on dram that isn't refreshed 
> herehttps://citp.princeton.edu/topics/memory/ 
> <https://citp.princeton.edu/topics/memory/>
> 
> I'm not sure whether power on pattern and unrefreshed memory will be the 
> same, it's way into analogue territory dealing with the differences.

It should be since at power on the capacitor in a DRAM cell is empty and 
if you stop refreshing it, it will also become empty after a while. 
Whether this 'empty' is read as '1' or '0' depends on the location on 
the die and on the manufacturer.

  Gerrit
Received on 2020-05-29 22:46:52

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