Just a note that I've moved a bit further along on the MMU idea. https://github.com/go4retro/UltiMem64 Current State: * 2MB_at_55nS SRAM for data * 64Kx16 bits_at_15nS for tag data (overkill, but smaller SRAM is no less expensive) * page size is fixed at 4kB for now * registers are sitting at 49152 for now (will be moved, not really worried about this at present) * MMU mappings are sitting at 49152+16 for now (low bytes only) * 49153 sets the current mapping "window". So, (49153)*16 is address into MMU ram for mapping data * 49154 sets the current mapping in use (256 maps to use) Feel free to peruse the repo and provide comments. A few notes: * Not sure how to hide the registers under some other IO, like SID mirrors or such, as any write will bleed through to the SID, unless IO is mapped out (and, I think memory write enable is not strobed when you are in IO space, but I could be wrong. Either way, hiding under IO means essentially you'll have to bank IO out to use. I'm not sure that's useful. * I realized tonight that VIC sends the lower 8 address bits first, and I was hoping it sent the upper 8 address lines. So, I need to add a clock signal to the design to wait for the upper 8 address bits, strobe the MMU ram for the mapping, and THEN perform writes. minor fixup. JimReceived on 2020-05-29 22:42:39
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