Re: C64 MMU POC

From: silverdr_at_wfmh.org.pl
Date: Sun, 22 Sep 2019 21:57:21 +0200
Message-Id: <BF32B0C5-92F1-4289-B5E3-80EB583C9077_at_wfmh.org.pl>
> On 2019-09-22, at 21:37, Mia Magnusson <mia_at_plea.se> wrote:
> 
>> 2 issues:
>> 
>>  * Some of the newer DIS replacements use those addresses
>>  * The MMU needs far more than 4 addresses, unless I switch to
>> indirect registers (IO1 is the address, IO2 is the data), but I'd
>> prefer not to do that.
> 
> Perhaps use extra addresses in the VIC-II address space? (Not sure if
> anything bad happens if you touch those addresses though).

It will conflict with the upcoming "Beam Racer" VIC "copper-style" extension.

> Maybe you could put registers in the $FFxx range like on the C128, with
> enable/disable in the regular I/O space.

While I understand the reluctance, "indirect" registers is probably the most viable, least "invasive" approach. The concept's been used in some chips of the time (and I didn't like it too ;-)

-- 
SD! - https://e4aws.silverdr.com/
Received on 2020-05-29 22:41:06

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