Re: C64 MMU POC

From: Jim Brain <brain_at_jbrain.com>
Date: Sun, 22 Sep 2019 15:15:26 -0500
Message-ID: <c8a902a9-0c50-ea41-ea19-ee2233ea4145_at_jbrain.com>
On 9/22/2019 2:55 PM, Justin Cordesman wrote:
>
> Forgive me if this is infeasible since I don’t know the architecture 
> well enough, but what about using the MMU’s privileged position to 
> watch for a specific peek or poke or both pattern and only then expose 
> addresses?  Assuming that is doable, you could even have alternate 
> patterns that would expose the MMU at different addresses so that it 
> was run time selectable.
>
> Justin
>
> > On Sep 22, 2019, at 13:37, Mia Magnusson <mia_at_plea.se> wrote:
> >
>
As I look at the MMU PLA mappings, it seems like the following 
combinations will be prevalent:

* ROMs banked in, IO banked in, so $cxxx is a good choice

* ROMs out, IO in, so $cxxx is good, and so if $fxxx

*All RAM, in which case $fxxx is best.

SD, indirect addressing also eats up macrocells in the CPLD, so it's 
doubly bad.

JIm


-- 
Jim Brain
brain_at_jbrain.com
www.jbrain.com
Received on 2020-05-29 22:40:19

Archive generated by hypermail 2.3.0.