Re: C64 MMU POC

From: laughton_at_cyg.net
Date: Wed, 10 Jul 2019 14:32:20 -0400
Message-ID: <6c0dd0ab756b3bd4f43f166c3ce53dee_at_cyg.net>
On 2019-07-10 13:47, Jim Brain wrote:
> On 7/10/2019 12:26 PM, laughton_at_cyg.net wrote:
>> 
>> How strong a guarantee do we need?  In the 1980's I built a computer 
>> that uses 65C02 (CMOS) undefined opcodes, so I'm familiar with those 
>> -- and some of them are very ill suited for cycle-saving branches 
>> etc.  I'm *not* familiar with NMOS undefined opcodes.  But it's 
>> reasonable to suppose there may be some which could serve the MMU 
>> function but otherwise are never (or almost never) used.  It's true 
>> this can't be 100% guaranteed.
>> 
>> As for the missing SYNC pin: one solution consumes PLD resources to 
>> create a state machine.  That seems like (and may indeed be) a rather 
>> expensive solution.  But it would be no surprise if someone who's 
>> willing to engage with the challenge (this is crucial) found it 
>> simpler than initially imagined.
> The Faks6509 project uses a similar idea, a small state machine to
> reverse engineer the SYNC pin function.

Whoa, that's great to hear!  But embarrassing -- it shows I haven't been 
following the project very closely.   My original proposal was in 2011, 
and I know you've made some very substantial changes.  But last I heard, 
weren't you using an '816 (and its VPA/VDA signals)?  In any case, it's 
a great example of asserting authority re: what an instruction does!  
The benefits are real, yet it's so rare for people to do this.


>> Failing that, I know of a $10 IC that's available in surface-mount 
>> which exactly matches the cycle-by-cycle behavior of an NMOS 
>> 6502/6510  ;o)
> 
> Hmm, you thinking of the 65C02S?  Because, I think we determined that
> the CMOS 6502 and the NMOS 6502 are not cycle exact.

Sorry to tease everyone -- it was the '816 I was thinking of.  My notion 
was to run it in parallel with the 6510, not to replace it.  In other 
words, the '816 address bus etc would connect to nothing, but during 
reads (code fetches) its data bus would have the 6510 data bus copied to 
it.  Then the oh-so-convenient VPA/VDA signals will reveal when the 
opcode fetches occur.

But if your state machine has already solved the problem then we can 
save $10 (and a little bit of PCB real estate)!  :o)

>   I know the
> Rockwell 65C02 differs in the execution pipeline and thus it fails
> with the Fake6509 project.
> 
> Jim
Received on 2020-05-29 22:30:52

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