Re: C64 MMU POC

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Thu, 11 Jul 2019 17:18:00 +0200
Message-ID: <1f582335-5e29-10de-e77e-362a4ca0bbed_at_laosinh.s.bawue.de>
On 7/11/19 2:37 AM, Jim Brain wrote:
> On 7/10/2019 1:32 PM, laughton_at_cyg.net wrote:
>>
>> Sorry to tease everyone -- it was the '816 I was thinking of.  My 
>> notion was to run it in parallel with the 6510, not to replace it.  In 
>> other words, the '816 address bus etc would connect to nothing, but 
>> during reads (code fetches) its data bus would have the 6510 data bus 
>> copied to it.  Then the oh-so-convenient VPA/VDA signals will reveal 
>> when the opcode fetches occur.
>>
> As SMF notes, illegal but non "JAM" opcodes will cause the CPU to 
> desync.  Maybe using a NMOS 6502 would work for the approach, but that 
> requires finding a NMOS '02

They should be easy enough to find. For example I have a number of 1541 
with dead R/W heads. Since that's fatal for use as a disk drive they are 
now only good for parts. One of them even has a 6502C as CPU, that one 
should be good for 4 MHz.

  Gerrit
Received on 2020-05-29 22:27:13

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