On Fri, Feb 01, 2019 at 02:12:39AM -0600, vossi wrote: > At page A-6 3.4 are the absolute,x addressing cycles. > There is also a T3 cycle (always - not only at page boundarys) with > discarded read. But I measured this with my 6509 and had no dummy read!!! Interesting. It sounds like the 6509 does away with the last cycle of those insns (which handles the carry in the address, on 6502). > Also interesting to read, that at 3.6 with sta indirect,y there is no carry > to the address highbyte and it needs always 6 cycles. > Is this an error in the manual? The incremented high byte is put on ABH only in cycle T5 (and for the absolute indexed, only in cycle T4). > At 2.7 the lda indirect,y has carry to the address-highbyte and has 5/6 > cycles dependent of the page boundary. On 6502, the last cycle of indirect,y and absolute indexed instruction isn't done if the insn is not RMW, is not a store, and no carry happened (and is done in all other cases). SegherReceived on 2019-02-01 10:01:05
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