Re: VIA shift register (was: Re: Did Commodore cheat with the quad density floppies?)

From: groepaz_at_gmx.net
Date: Thu, 10 Jan 2019 08:33:54 +0100
Message-ID: <3027615.dHc4rexKpB@rakete>
Am Donnerstag, 10. Januar 2019, 08:26:16 CET schrieb André Fachat:
> Am 10. Januar 2019 08:20:16 schrieb groepaz@gmx.net:
> > Am Donnerstag, 10. Januar 2019, 08:11:04 CET schrieb André Fachat:
> >> Am 9. Januar 2019 12:17:17 schrieb Francesco Messineo
> >> 
> >> <francesco.messineo@gmail.com>:
> >>>> The major issue was actually the speed - not really of the bus but of
> >>>> the
> >>>> 1541 implementation with 6522 software workarounds making the bus look
> >>>> worse than it really was. Common thing was to add at least the parallel
> >>>> connection to 1541, bringing it somewhat closer to the original GPIB.
> >>>> And
> >>>> yes - it still allowed more than two devices and obviously not only the
> >>>> floppy drives.
> >>> 
> >>> Yes, that was due to a bug in the 6522 chip.
> >> 
> >> Never having fixed the shift register bug in the VIA 6522 e.g. in a new
> >> revision is my biggest gripe with MOS and Commodore. It would have made
> >> so
> >> many things so much easier.
> >> 
> >> Well, that's history. Anyone know if there is a fixed CPLD/FPGA VIA?
> > 
> > the CMOS versions (which are still available) have the external clocking
> > bug fixed, AFAIK
> 
> Did they? Do you get them still?
> 
> After sending I remembered the WDC but they are not plugin replacements as
> they have active IRQ drivers and need an extra diode.

perhaps, i dont know. i dont trust CMOS replacements of NMOS parts at all, so 
never looked closer :)

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Received on 2019-01-10 09:01:42

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