Re: Did Commodore cheat with the quad density floppies?

From: Mia Magnusson <mia_at_plea.se>
Date: Tue, 8 Jan 2019 18:19:23 +0100
Message-ID: <20190108181923.00000d26@plea.se>
Den Tue, 8 Jan 2019 12:08:35 +0100 skrev Gerrit Heitsch
<gerrit@laosinh.s.bawue.de>:
> On 1/7/19 9:02 PM, Mike Stein wrote:
> > 
> > The alternative of turning on the motor with the DS signal would
> > mean delaying access until the motor came up to speed; imagine
> > disk-to-disk copy with relatively crude belt-driven motors starting
> > and stopping with every access...
> 
> Well, a proper disk-2-disk copy doesn't switch drives after each
> block or file, it reads as much as it can into memory and then writes
> it out again.

The original IBM PC motherboard supported configurations of 16, 32, 48
and 64k RAM. Not sure if they ever sold with less than 64, but with
DOS 1.0/1.1 and any kind of copy software loaded there would be less
free memory than for example when copying floppies with a C64.

> > It's so easy to sit back and criticize the decisions and choices
> > made in the distant past without fully taking into account the
> > constraints that influenced them.
> 
> Most of the stuff on the PC was 'has to be cheap'. That's why they
> used the 8088 and not the 8086,

Or maybe the market didn't really care for CPU speed at that time,
right?

> clocked it at 4,77 MHz (which is the NTSC color crytsal, 14,318 MHz
> divided by 3)

That is really clever. They sacrificed 4.6% of the theoretical
performance of a 5MHz 8088 to get rid of another crystal oscillator.

> and made a few other questionable decisions like active high IRQ
> lines.

Intel is to blame here. They designed their stuff to have active high
interrupt lines (and iirc reset lines and similar signals too). Not
sure why they made that decision, either due to something related to
noise resistance or perhaps just bad luck.

The questionable thing is really that the lines have pull-up. In Amiga
600, 1200 and 4000 commodore did solve this by instead having pull-down
on the interrupt line in the IDE interface. (IDE is basically a
stripped down ISA bus with two I/O address spaces decoded to two select
lines. The timing and how all signals work is straight forward ISA on
IDE).


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Received on 2019-01-08 19:02:20

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