Den Fri, 20 Jul 2018 11:30:20 +0100 skrev smf <firstname.lastname@example.org>: > On 20/07/2018 07:11, Baltissen, GJPAA (Ruud) wrote: > > Are you sure that this happens with the SCPU as well? > > It doesn't, by default it mirrors writes to the first 64k > > This slows the super cpu down, because it can run software at 20mhz > but if two writes happen one after the other then it has to wait for > the first 1mhz write to complete. > > So you can turn off mirroring of certain ranges. > > http://ftp.giga.or.at/pub/c64/supercpu/superprog.html > > If you add an ultimax mode then you still have to mirror ram at the > start of memory, but you have to solve the problem of interleaving > the 1mhz vic reads into the 20mhz cpu reads. The speed of the VIC-II reads won't be a problem, it's just a matter of inserting one wait state for the 65816 unless you have super fast ram that can run zero wait state at the equivalent of 40MHz, then you don't even need a wait state. Such fast rams which might be available as cache rams, remember that you only need 64k of those unless you want to add register to let VIC access more than 64k. > You still need to support all the supercpu mirroring schemes as well, > or you won't be able to get the correct timing for demo effects. Will 6510 based demos work at all on a 65816? I'd assume that they use some well known illegal op codes? -- (\_/) Copy the bunny to your mails to help (O.o) him achieve world domination. (> <) Come join the dark side. /_|_\ We have cookies.Received on 2018-07-23 23:00:05
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