Re: BASIC for the CBM-II/8088

From: Michał Pleban <lists_at_michau.name>
Date: Mon, 16 Jul 2018 14:56:00 +0200
Message-ID: <5B4C95E0.9070405@michau.name>
Hello!

Mia Magnusson wrote:

> Then the list member SMF would figure out a yet non-existing use case
> where those user port pins are needed for something else ;) ;)

Well, the user port _is_ meant to connect different stuff to it, so it
would make more sense to leave it free.

What I thought about is whether this kind of latch could be implementd
in a 16V8 in registered mode? Then there is also output enable pin, so
it could be used to attach it to the 8088 easily.

> A rather complicated solution which probably would be efficient would
> be to not have a simple flip flop remembering which areas that were
> written to, but a counter for each area (which cannot overflow but
> gets stuck when reaching it's max value). That way the software can
> check how much has been written to a particular area of the screen. If
> it's only a few bytes, SCASW would be the fastest solution while if
> much has been written a pure copy would be the fastest.

If we start doing complicated stuff like this in hardware, the I suppose
in the end it will become easier to just slap a 6845 on the board and
make it generate video signal itself :-P

> The performance-wise best solution must be to use some synchronisation
> so the same memory can be simultaneously used by both the 8088 and the
> 6509. There are expensive dual port SRAM's but I think it would be good
> enough with a solution that just delays one processor when both want to
> access the memory at the same time. Or it could even work like the
> original CGA card, with "snow" if the 8088 writes outside the vblank
> period, but this "snow" would be that the 6509 gets incorrect data
> while reading. As this is easily detectable by the hardware, it could
> generate some flag or interrupt to the 6509 making it redo the last few
> bytes.

There is a RDY input on the expansion connector, so it might be possible
to stop the 6509 from the 8088 side. But IIRC, the are buffers on the
mainboard that explicitly select one processor or the other for memory
access, I would have to examine them whether it's possible at all to
allow two CPUs access to the RAM.

I also thought about dividing the screen refresh between two CPUs. The
8088 could read the data bytes from memory, feed them to the 6509 via an
I/O port and signal the 6509 via the SO pin, upon which the 6509 would
read them, convert to PETSCII and save to video RAM. This way both CPUs
would work in parallel, so maybe it would allow speeding up the whole
process.

> Btw this must be easy to check with an emulator.

What I did was to debug some programs using either DEBUG or patching my
INT routines to output every call to the serial port. You can use DEBUG
too in the emulator and it will be a bit faster, but otherwise I am not
sure how to do it more efficiently (unless you patch and recompile an
emulator like PCem to trap nad report CRTC port access).

Regards,
Michau.
Received on 2018-07-16 15:01:46

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