Weird /KERNAL line on old boards

Here is the history,


Original idea by Jim Brain
http://cbm-hackers.2304266.n4.nabble.com/Switchless-ROMs-td4662130.html

Here is my take on it
http://cbm-hackers.2304266.n4.nabble.com/Wireless-switchless-kernal-mod-td4665833.html


https://www.youtube.com/watch?v=gwpgLJTUj-I

The adapter I built principally works by doing some kind of covert
channel communication through /KERNAL chip selection line. C64 toggles
the line doing a one cycle kernal read access in a certain fashion.

This method works in new boards equipped with 64 pin Sharp ICs which
serves as PLA and integration of other stuff like color ram.

But it doesn't work on old boards. The reason is : Even if you turn
off kernal access by turning off interrupts and not calling any kernal
routines there is constant /KERNAL chip selections.

Here are my findings,

1. In similar scenario /BASIC line is clean.

2. /KERNAL line is clean if KERNAL is switched off  using processor
port. (Obviously this is not enough for my adapter to work)

3. The duration of these sporadic chip selects are around 41.67 ns and
aligns with PHI2 high. (I don't know if it's accurate since I measure
this with a 24mhz logic analyzer)

4. Turning off VIC display doesn't help.

5. Signal is dependent on what is displayed on the screen. If screen
is empty then it even goes to full 1mhz 0.5us low / 0.5 high with 41us
intervals between these accesses.

Long Full 1 mhz (Full 1mhz | 41us no access)*25

This directly resembles screen generation of VIC-II chip, 25 gaps
corresponds to specific badlines.

This final finding gets me thinking I'm possibly measuring it wrong.

I'm doing this measurement directly on 906114-01 PLA's pin #16, /KERNAL.

What do you think?

Regards,

Nejat