Quoting Jim Brain <brain@jbrain.com>: > I was able to test the v3 board. NMOS 6502 seems to work fine (long > startup, function keys work), but I will run Michal's test app > tomorrow night. > > 65C02 does not work (it boots, but does not do long ram test). > Since the NMOS works fine, and the only thing different is the CPU > itself, I think the CMOS 65C02 uses fewer cycles to perform the > opcodes. Well, the *number* of cycles remains the same, NMOS vs CMOS, if it's the $B1 and $91 instructions we're talking about. But with $91 there's a change regarding what *happens* during those cycles. Earlier I mentioned bug "fixes" that were introduced with the 'C02, and these may be relevant. I don't have a full explanation, but let me mention what I noticed. Spoiler alert: I think a 65816 (or 65802), acting the role of an NMOS 6502, might avoid the problem! This image [1], taken from the traces for the $91 instruction, shows how the bus cycles compare between NMOS and CMOS 02's. Cycle +0004 is where the two differ. There's no page crossing; therefore the NMOS '02 already has the fully formed address, and it puts that address ($D000) on the bus... as a read. On the final cycle (+0005) a write occurs, also to $D000. In other words, this STA instruction does a read before the write. That's the NMOS behavior. The CMOS '02 is more cautious, thanks to the fix, and in cycle +0004 it re-reads the byte it read in cycle +0003 -- ie, the MS byte of the indirect ptr. This eliminates the unscheduled read before write. :-) But in the present situation could the read before write somehow be beneficial (or its absence detrimental)?? In cycle +0004 the address bus is different... and of course the data bus, too. Hard to see why it would matter, but we're faced with a very strange puzzle here. If indeed we find that the CMOS '02 behavior is problematic, we may be forced to go back to NMOS... or else use a 65816! This messes up the pinout, unfortunately. But the $91 "fix" -- and other fixes! -- are absent on the '816, presumably because its VPA and VDA outputs are an alternative way to neutralize "funny" cycles. Hope this helps, or at least triggers someone else to a new and productive train of thought! Jeff [1] http://laughtonelectronics.com/both%20$91's.JPGReceived on 2018-07-04 08:00:04
Archive generated by hypermail 2.2.0.