On 6/29/2018 12:18 AM, Jeff Laughton wrote: > > > > LDA (z-pg),Y has a dead cycle only if there's a page crossing. For > NMOS a Partially Formed Address appears in the dead cycle (the > penultimate cycle). The PFA hasn't yet had carry added to its highbyte > -- IOW the PFA is $100 less than the intended address. For CMOS the > PFA is concealed internally and the dead cycle refetches the last > instruction byte at PC@ instead. <---- !! > > STA (z-pg),Y always has a dead cycle. During this cycle... > NMOS with a pg Xing puts a PFA on the bus > CMOS with a pg Xing refetches PC@ <----- !! > NMOS without a pg Xing puts the final, fully formed address on the bus > CMOS without a pg Xing puts the final, fully formed address on the bus > > IOW these last two cases involve a read-before-write. > > related post here: http://forum.6502.org/viewtopic.php?p=57496#p57496 So, with some time to look over the traces, any ideas on what to change? JimReceived on 2018-07-02 08:00:04
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