Re: Hardware emulation of 6509 using 6502?

From: Michał Pleban <lists_at_michau.name>
Date: Thu, 28 Jun 2018 18:14:02 +0200
Message-ID: <5B35094A.6080800@michau.name>
Jim Brain wrote:

> bank access simple: OK
> bank access overflow: OK
> bank access other: OK
> bank execute: OK
> read bank direct 1: OK
> read bank direct 2: got FF, expected 0f
> read bank indirect 1: f0, expected 00
> read bank indirect 2: ff, expected 0f
> 
> Michal, what do I need to do to fix the remaining items?  It looks like
> read the read happens, it is filling the top bits with 1, but my assign
> statement specifically puts 0's there:

My first wild guess - is it reading the value only from the latch, or
from the RAM as well? If it reads also from RAM, then this value will
obviously conflict from what the latch outputs, and maybe the RAM wins.

For amore detailed analysis - can you post the results from the tests on
the previous board, and the current Verilog code?

Regards,
Michau.
Received on 2018-06-28 19:01:39

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