Is there a document that explains the purpose of MUX/GATE_IN? Why did the 264 series need to latch the R/W line and why did they need to do it in the CPU in such an inefficient way? It would seem routing through TED or maybe a few transistors (Bil notes that there was an edict to keep IC count low) would have been far better, as NMI was given up, a huge loss.Received on 2018-06-18 11:00:18
Archive generated by hypermail 2.2.0.