Re: DMA successes with Verilog

From: Jim Brain <brain_at_jbrain.com>
Date: Thu, 14 Jun 2018 21:08:52 -0500
Message-ID: <6a092a7b-11bd-210a-8518-46050c8a649a@jbrain.com>
On 6/14/2018 4:38 PM, Nejat Dilek wrote:
> This is wrong, this is just the behaviour of the chipset in the C64.
I thought we were talking about the 64 behavior?
> And I don't think NMI line is held low that way because NMI is edge
> triggered unlike IRQ which is level triggered.
I'll defer to Marko or someone who knows how his technique works.

Jim
Received on 2018-06-15 05:00:30

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