Re: PET 2001N $E8xx data bus conflict?

From: Francesco Messineo <francesco.messineo_at_gmail.com>
Date: Mon, 16 Apr 2018 15:53:13 +0200
Message-ID: <CAESs-_wy0nuDwK7g83SnDa67X=5JOitUDJUTxAUuZv+06ofT1w@mail.gmail.com>
Hi Andre,

On Mon, Apr 16, 2018 at 2:36 PM, And Fachat <afachat@gmx.de> wrote:
> If it is the old PET with 2k ROM chips, thise 6550 (6540? Can't remember)
> had additional select lines. I'm sure the ROM has A11 connected and uses it
> internally as additional select, so it is only active in $e000-e7ff.

No, as I said, the old (first) 2001 design with static RAMs and 2K
ROMs (either 6540 or 2316) has a big I/O space from $E800 to $EFFF
with shadows of the same I/O ports.
I'm talking about the 2001N schematic, the one with dynamic RAMs and
4K ROMs, they added the X8XX signal to enable I/O chips only in the
$E8xx addresses, but I can't see from the schematic how they prevented
the UD8 ROM to be "quiet" when the I/O is addressed since it's enabled
only by /SELE signal.
I think the schematic is wrong, and one of these days I'll check in
the actual PCB to find differences.
I thought I'd ask here if anyone already noticed the "error" in the
schematic (or in my reasoning).

>
> André
>
>
>
> Am 16. April 2018 14:17:49 schrieb Francesco Messineo
> <francesco.messineo@gmail.com>:
>
>> Hi All,
>> looking at 320349 2001N schematics on zimmers.net I can't really
>> understand how the I/O space addressing don't make a data bus
>> conflict.
>> On schematic 4, the UD8 select is directly connected to /SELE, which
>> is low from $E000 to $EFFF, so UD8 must hold the databus even during
>> $E8xx accesses.
>> UD8 databus, like all other ROMs, appear to be directly connected to
>> 6502's databus, without buffers.
>> What am I missing? In the original 2001, there was no ROM mapped from
>> $E8000 to $EFFF, but in 2001N, the I/O chips are addressed with both
>> /SELE and X8XX signal that decodes (as the name suggests)
>> A11,A10,A9,A8 = $8.
>> I feel stupid, I know that 2001N works in real life, I have one
>> myself, but I can't think that schematic is correct.
>>
>> Frank IZ8DWF
>>
>
>
>
Received on 2018-04-16 16:00:02

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