Den Wed, 28 Mar 2018 22:04:46 +0300 skrev Nejat Dilek <imruon@gmail.com>: > On Wed, Mar 28, 2018 at 6:06 PM, <groepaz@gmx.net> wrote: > > Am Mittwoch, 28. März 2018, 17:01:13 CEST schrieb Jim Brain: > >> On 3/28/2018 5:18 AM, Nejat Dilek wrote: > >> > The question is, is there any such previous work for an > >> > algorithm or similar for such a syncing job? > >> > >> Not sure how specific your question is, but there is a project on > >> Forum64 (I think) that uses a uC to select and load into a FLASH > >> ROM lots of KERNALs I can't remember the name offhand (MegaROM, > >> UltraROM, something like that). I would assume it uses a similar > >> capability. > > > > superkernal -> > > https://www.forum64.de/index.php?thread/74462-projekt-superkernal-24-in-1-kernal-ersatz-extras/ > > > > -- > > > > I saw SuperKernal it's really a nice project. I think, if I'm not > mistaken by the looks of it, it does it's job by completely emulating > the rom. I'm trying to use a different approach with different > hardware specs and with different goals. 8-16mhz attiny85 with bare > minimum program flash along with 27c512 rom. > > - I don't want to (and I can't actually with that chosen micro) chase > the individual cycles of rom accesses. Then you need to gate/latch the adress bus pin with CE/OE on the ROM socket. Otherwise you will see "noise" from other bus activity. > - I'll not drive the databus > - I'll only listen to 1 address bit > - That address will be modulated so that receiver will understand > sender is active and it's just not out of regular use of the computer > (1st problem : pilot sequence) > - Pilot sequence will be iterated until receiver is in sync with the > sender (2nd problem : syncing) > > Much like the pilot sequence of loading from tape. You could trigger it by checking if rom accesses are data read or code execution. When executing code the accesses comes far more often while data accesses will have longer time between them. The exception is that even when executing code there will be a pause when there is a "bad line". Maybe you could make the 6510 CPU run patched code in some place of the ROM area, but read accesses that's obviously data read instead of code execution could still read back the expected contents. With a circuit that replaces a combined kernal+basic rom (later C64, and afaik all C128 in C64 mode) you could perhaps use the "MICROSOFT" obfuscated string in basic rom near the arithmetic table? Or maybe that won't work. It takes atleast two accesses to really detect code execution (and atleast three if a bad line happens between the first and the second) and the standard content of the rom must atleast be somehting that won't hang the CPU (or jump too far outside the ROM) when executed. Any other area that's purely data in ROM would also work, but as you want to be able to switch between all kinds of KERNAL ROMs it must be something in the BASIC rom, otherwise it might only work on some ROMs. This would be a nice solution since you could jump to the rom selector firmware simply with a SYS statement. No need to load any special software or similar. -- (\_/) Copy the bunny to your mails to help (O.o) him achieve world domination. (> <) Come join the dark side. /_|_\ We have cookies.Received on 2018-03-29 19:00:02
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