Re: Building a 6502 peripheral - timing

On 03/15/2018 08:48 AM, Baltissen, GJPAA (Ruud) wrote:
> Hallo Gerrit,
> 
> 
>> ... to make sure that /WE on the RAM can only go low as long as PHI2 is HIGH.
> 
> IMHO the CS input of a SRAM already does take care of that.

No, it doesn't unless you add it to your decoding logic. If your 
decoding logic only uses address lines (Like just using A15 as /CS when 
using a 32K SRAM), the RAM will become active quite a bit before PHI2 is 
HIGH.

The 'approved way' (tm) to do it is to use PHI2 only in the generation 
of the /WE signal for the RAM so that /WE can only go low as long as 
PHI2 is HIGH.

  Gerrit