Re: Something else... 8501 GATE-IN

From: Mia Magnusson <mia_at_plea.se>
Date: Wed, 14 Mar 2018 20:19:37 +0100
Message-ID: <20180314201937.00001efc@plea.se>
Den Wed, 14 Mar 2018 19:58:14 +0100 skrev Gerrit Heitsch
<gerrit@laosinh.s.bawue.de>:
> On 03/14/2018 07:01 PM, smf wrote:
> > On 14/03/2018 17:39, Gerrit Heitsch wrote:
> > 
> >> You can't leave AEC high all the time even if you run the RAM at 
> >> double speed compared to now. The 8501 will not take its address
> >> lines offline, so when TED does an access, you will have to take
> >> AEC LOW to prevent bus drivers in CPU und TED fighting each other.
> >>
> > I was assuming you'd buffer them as part of the multiplexing and
> > make them think they were the only things connected to the RAM.
> > 
> > If you keep the CPU and TED clocked together then they will both
> > start their accesses at the same time, you'd then satisfy them both
> > in the same time the original dram would satisfy one.
> 
> That will produce problems with CPU access to TED registers.

I assume that the CPU can tolerate a slow-down of the clock until TED
is ready for access to it's registers.

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Received on 2018-03-14 22:35:55

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