Re: PET 2001 RAM question

From: Francesco Messineo <francesco.messineo_at_gmail.com>
Date: Wed, 31 Jan 2018 00:01:58 +0100
Message-ID: <CAESs-_w7HHbXkAP02orMccjP05op2cVuC2_VK20BXkO6q5hY7Q@mail.gmail.com>
On Tue, Jan 30, 2018 at 11:18 PM, Mia Magnusson <mia@plea.se> wrote:

> Addition:
>
> Also as 6502 afaik always drive the adress bus, you anyway need bus
> separation between the 6502 and the video circuit, so the video ram
> is anyway separate from the main ram. (The same is true for VIC-20, it
> has buffers for both the adress and the data bus which is disabled
> during the video halv of each cycle).

sure, but I was talking about the few 2001 boards that use 2114 as
main RAM too, so there's no address conflict in this case.
Making sure the /WR signal to the RAM happens only when it's supposed
to happen was too obvious, but I was rather asking why
the selects wheren't qualified with PHI2, and the answer is that 6502
knows when to read the data bus anyway.
I'm repairing a few 2001s lately.
By the way, I can now read 6550s and 6540s in a custom microcontroller
unit, so I can dump/test all the 6540s easily out of a PET board.
I've discovered that my own two 6540 spares are actually only one
spare by now :/

Frank

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Received on 2018-01-31 00:00:03

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