On Fri, Dec 29, 2017 at 6:12 PM, Gerrit Heitsch <gerrit@laosinh.s.bawue.de> wrote: > On 12/29/2017 10:19 AM, Francesco Messineo wrote: > >>> Well, a standard eprom programmer would read the old adress when >>> A0/PHI2 is low, and when A0/PHI2 goes high the 6540 would output >>> correct content on the data bus. Thus you'll have to throw away every >>> odd byte from the readout, but every even byte would be fine. This >>> assumes that there are no noise on A1...Ax at the time A0 goes high. >>> >> >> It's not that easy: if you use the plain A0 as phi2, then A0 toggles >> together with other addresses, it >> means that the rising edge of A0 is too close to the other addresses >> edges, and that violates the Tads of 80 ns minimum > > > Yes, but A0 toggles twice before A1 changes. So one of the edges should see > all other address bits unchanged => no problem with the setup time. hm yes, that sounds right if the particular programmer uses a parallel port for the address bus and not for example a transparent shift register (serial to parallel, I've seen many doing that). And it should work not inverted, as the "good" edge is the 0->1 toggle. I will try that, on the programmer that doesn't care if on some locations the data bus isn't driven (when A0 = 0 in this case), on the DATA I/Os that I have isn't possible to tell the programmer to "ignore" the data bus tristated during reads. Frank Message was sent through the cbm-hackers mailing listReceived on 2017-12-29 18:03:46
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