Re: Hardware emulation of 6509 using 6502?

Den Wed, 08 Nov 2017 15:35:49 +0100 skrev Michał Pleban
<lists@michau.name>:
> Also, with the current schematic, writing to $0 and $1 will also cause
> writing to underlying RAM, which should not be a problem normally as
> the bank 0 is empty, but maybe it's better not to do it. In this
> case, you would want to route R/W signal through the CPLD from 6502
> to 6509.

Unless you actually write to whatever is connected to the CPU at adress
$?0000/$?0001, then whatever is connected will drive the bus at the
same time as the CPU drives the bus.

You'd need a buffer that can be switched off or you'd need to route the
data bus through the CPLD (if enough pins could be found).

Are we even sure how the real 6509 does? Writing a short look that
stores data in one or two of the registers and then just loops back.
That would produce a load of write pulses if write actually goes out on
the external bus, but it won't produce any write pulses (except the
spurios ones generated by interrupt service routines e.t.c.) if writing
to 0/1 doesn't generate any write pulses.


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