Re: How hardware accelerators deals with $0/$01

From: Mia Magnusson <mia_at_plea.se>
Date: Thu, 19 Oct 2017 22:59:34 +0200
Message-ID: <20171019225934.00006de4@plea.se>
Den Thu, 19 Oct 2017 22:30:19 +0200 skrev Gerrit Heitsch
<gerrit@laosinh.s.bawue.de>:
> On 10/19/2017 10:13 PM, Mia Magnusson wrote:
> > 
> > B.t.w. I've been toying with an idea to make a "super accelerator"
> > which completely disables on-board ram (with an adapter/replacement
> > for the PLA) which lets VIC access the faster ram via a buffer.
> > That way VIC would only have to use one "fast" cycle, i.e. only use
> > one 20MHz cycle (for a 20MHz 65816) or with fast enough ram it
> > could even use a "halv cycle" of the 20MHz bus if the RAM is fast
> > enough. That way we could get rid of the "shadow"/"cache" things in
> > a 65816 accelerator.
> 
> Something like this is done in the C64 reloaded V2 which dispenses
> with the DRAM and uses an 128 KB SRAM which then also contains the
> color RAM. I think they run a double cycle and use a latch.

Oh, good, then I don't have to do the work :)

It's interesting that no one did this earlier. Even though ram were
expensive back in the days, there had to be fast ram on a 65816 card
anyway and being able to remap it so that VIC uses fast memory (and
maybe put the existing internal slow memory in another part of the
65816 adress space) would had been a nice feature at the time.

> The color RAM is also something that makes accelerators complicated,
> you can do a lot of things with external RAM, but the color RAM can't
> be ignored, you have to use the one inside the C64.

True.

It would actually be easier to handle the color ram if an accelerator
card contained some non-6502 compatible processor, like 68020 or
similar. Then the VIC could access RAM as if it were a 16 bit device
(throwing away the four upper bits).

> > Such hardware could either be a cardridge with some adapter in the
> > PLA socket, or could be some internal thing sitting in the PLA and
> > CPU socket. Maybe it would even be better to use a 6502 CPU instead
> > of 6510 for the standard speed mode, as that would use the same
> > $0/$1 emulation as the accelerated mode, thus getting rid of the
> > need to copy stuff between emulated and real $0/$1 port. That could
> > also free up some spare 6510 CPU's if there is any shortage of such
> > CPU's on the market.
> 
> You can 'emulate' $01 and $00 with a properly wired 6522 (wasting
> most of its capabilities) and some external logic, I've seen
> schematics on the web. So you should be able to replace a 6510 with a
> 6502, a 6522 and a handful of TTLs, among them 74LS245.

Yes, for example Ruud who is on this list have done this:
http://www.baltissen.org/newhtm/10to816.htm
:)


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Received on 2017-10-19 21:05:28

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