> On 2017-09-02, at 04:10, Mia Magnusson <firstname.lastname@example.org> wrote: > >> When I was pushing that, I was almost sure everything could be >> handled and corrected. The eventual show-stopper was when I realised >> that odd and even fields are actually of different duration and there >> is no way to make VIC-II generate make every other field >> longer/shorter. > > Well, as long as you can store about one line you could tweak the clock > frequency of the computer so that it produces 624 lines every 1/25 > second, and then just insert one extra line on every other field. I was thinking of alternating a flag for odd/even field and then delaying or not the output by half-line depending on the flag state. I gave up the idea because the VIC would have to be made to alternate its output too or I never get the fully correct timing I am trying to achieve. The idea of changing the clock also crossed my mind but I dropped that one too as one of the tier 1 objectives is not to affect software compatibility. That excludes any behind the scenes messing with the clock speed as too many things are timed with clock cycles. But... now, that you mentioned it and after giving it another thought, it might actually be possible, although even more complicated than I thought before, which was already more complex than I'd like it to be in the first place :-) It would require: - decoupling the phi0 from the VIC so that it remains always constant - driving only the last line alternately at twice / half the regular clock so that everything but the last line remains unaffected - VIC not going mad when pushed to run twice as fast as it is used to Hm... this might actually be worth checking. -- SD! - http://e4aws.silverdr.com/ Message was sent through the cbm-hackers mailing listReceived on 2017-09-02 12:02:57
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