Re: Faster IEEE routines

From: Jim Brain <brain_at_jbrain.com>
Date: Thu, 25 May 2017 08:40:23 -0500
Message-ID: <145b4db8-bfc0-950d-f9d6-0671e5671e0c@jbrain.com>
On 5/25/2017 4:20 AM, Francesco Messineo wrote:
>
> if a good schematic (and a dump of the TTL prom) is available, I might
> like to make such a reproduction (particularly if someone wants to
> help condensing most of the glue logic into a cpld).
I'd not mind converting the logic (I use opportunities like this to 
continue to learn HDL.)  A good schematic would be a useful first step, 
though.

Jim


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