On Wed, Dec 21, 2016 at 10:22:33PM +0100, Michał Pleban wrote: >>Is the power to the driver and receiver chip very well bypassed? > >I am not sure what that means :-( Did you measure the Vcc and GND at both chips, relative to the ground plane? If there is noise in the power supply, all sorts of strange things can happen. Basically, whenever there is a problem with digital electronics, one of the first things that you should check is the power supply to each chip. I suppose that "well bypassed" means that there is both a large electrolytic capacitor and a smaller capacitor between the Vcc and GND of the chips. >> Also, whenever you suspect a crosstalk issue, take a picture of both >> signals, not just one :) > >There are six signals in the cable, plus GND and reset. I am not sure >what crosstalks with what :-( Is there a transition on any of the other signals where you see the spikes? If all signals are stable during the spikes, then the source of the distortion should be something else. Looking at the picture http://tinypic.com/view.php?pic=nqqth&s=9 again, both spikes seem to correlate with the high-to-low transition of the clock signal itself. The small negative spike occurs just before the transition, and the positive spike occurs almost 1/4 clock cycles after the transition. I guess the negative spike is not a problem, but the positive one is. Causation is not correlation of course. I would expect there to be some transition in some line some time after the high-to-low transition of the clock signal. Can you check the other 5 signals, one at a time, together with the clock signal? Marko Message was sent through the cbm-hackers mailing listReceived on 2016-12-22 06:00:02
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