Re: cbm 8032 io area $e800-$e8ff decoding

From: André Fachat <>
Date: Wed, 09 Nov 2016 21:42:08 +0100
Message-ID: <>
It's even worse. The high active chip select lines of at least the VIA and 
PIAs are simply connected to address lines A4, A5 and A6 (and CRTC maybe to 
A7). This creates the known addresses $e81x, e82x and e84x.
The only problem is that if you access a combination like e83x you access 
the two PIAs in this case at the same time! You can easily write to 
multiple chips like that, but you create bus conflicts on read.

So, as summary, you can't use the gaps between the chip address ranges for 
your own stuff.

I've seen module space in $9xxx or $Axxx for this


Am 9. November 2016 21:30:36 schrieb didier derny <>:

> Hi
> Is there any solution to use in area between $e800-$e8ff to add extra
> chips ?  (PIA / ACIA) ?
> is the decoding partial and standard chips shadowed  or any free places ?
> --
> didier
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Received on 2016-11-09 21:01:16

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