On 10/30/2016 10:45 PM, Francesco Messineo wrote: > On Sun, Oct 30, 2016 at 9:15 PM, Gerrit Heitsch > <email@example.com> wrote: >> On 10/30/2016 07:28 PM, Francesco Messineo wrote: >>> >>> On Sun, Oct 30, 2016 at 7:23 PM, Gerrit Heitsch >>> <firstname.lastname@example.org> wrote: >>> >>> >>>> >>>> 5V and 4.3V. If an EPROM starts to lose data, it helps to lower Vcc. Why >>>> becomes obvious once you understand how and EPROM cell works. >>> >>> >>> >>> ok, I'll do that. If it's marginal, then it helps to read at Vcc of 5.5V >>> or 6V. >> >> >> No, if it's marginal, you need to read it at LOWER Vcc. > > ok I understand, low gate charge makes a better "0" at lower Vcc, isn't it? Yes... The same reason why you verify the EPROM after programming with a higher Vcc (6V or so), to make sure the cells have a large margin when used at +5V. Most programmers do that automatically. Of course, there is a lower limit to how far you can reduce Vcc, but so far any EPROM I tried had no problem with a 1N4148 used to steal in the range of 0,7V and there were EPROMs where that made the difference. Gerrit Message was sent through the cbm-hackers mailing listReceived on 2016-10-31 18:00:03
Archive generated by hypermail 2.2.0.