Re: MAX Machine PLA

From: Michał Pleban <>
Date: Sun, 31 Jul 2016 19:36:15 +0200
Message-ID: <>

Segher Boessenkool wrote:

> /me looks at the 2114 timing diagrams...
> We have a bet ;-)

Good! I need to create some hardware test suite to determine equations
for the address decoding logic, so I will try to test that as well.


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