Re: FPGATED

From: Segher Boessenkool <segher_at_kernel.crashing.org>
Date: Sat, 23 Jul 2016 14:42:47 -0500
Message-ID: <20160723194247.GC13327@gate.crashing.org>
On Sat, Jul 23, 2016 at 09:16:18PM +0200, Gerrit Heitsch wrote:
> >>>The visual6502 project has a die picture of an 8501.  From the picture
> >>>it seems clear that both the 8500 (c64c) and 8502 (c128) used the same
> >>>silicon, with different contacts bonded out.
> >>
> >>You sure? The 8501 is missing Port-Bit 5. It's not only not bonded out,
> >>it's not present, you can't set it while the 8500 has all the port bits,
> >>you can set them.
> >
> >(bit 5?  Do you mean bit 7?)
> 
> No, the 8501 is missing Bit 5, Bit 6 and 7 are present and used. They 
> are used as inputs from the IEC bus. I assume since that makes is easy 
> to use the BIT command or ROL/ASL for serial/parallel conversion.

Ah, yes, I should look more carefully at the die pic :-)

> >Why do you think you can set all port bits on the 8500?
> 
> Because people have been trying to use Bit 6 and 7 to determine CPU 
> temperature or detecting a 6510 or 8500 from the time it takes a 1 to 
> become a 0 when switching the port from output to input.

It will be interesting to see what 8500 looks like, then.


Segher

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Received on 2016-07-23 20:01:02

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