On 5/28/2016 3:23 PM, David Wood wrote: > AFAIK the firmware roms (basic, kernal) don't get gated; You are correct, they do not. > they're on the bus with the /BLK(1,2,3,5,6,7) areas. The char rom and > internal ram get gated because the nmos 6502 doesn't have the ability > to tristate its buses, and the VIC chip needs the buses to get video > data. Since the character bitmaps and internal ram are necessary to > provide a working display they have to be on the VIC side of the gates. I understand, I had the use of UD9 backwards. I notice now that all of the areas that can't be reached by VIC-I are noted on the UD9 input list (RAM1,2,3, BLK1,2,3,5, etc.) > > Why the I/O space is included is something I'm unsure about. Likely a > cost-saving method since the VIC chip does have to be on the gated > side of the bus and it's also an I/O device in itself. Yep, that is interesting. IO0 is not included in the list, and the VIAs use BDX lines. It must just be a cost saving reason, as the VIA address lines use CAXX lines, not VAXX lines. Jim Message was sent through the cbm-hackers mailing listReceived on 2016-05-29 05:00:02
Archive generated by hypermail 2.2.0.