On Mon, May 09, 2016 at 10:22:09PM +0200, A. Fachat wrote: > A dummy read occurs when the processor still needs to calculate some > addresses or data before it can be written. The 6502 does a bus access every cycle; sometimes it doesn't have any useful access to do, e.g. sometimes it doesn't have the address it wants to access handy yet, or perhaps this is a one-byte insn (that takes two cycles), etc. > For example, if the addressing > mode abs,x crosses a page boundary, it first does a dummy read on an > address where the low address byte is added to, but the high address byte > is not yet incremented. So if you read from $00f0,x with x equals $12, > there first is a dummy read from $0002, and then the actual valid transfer > (read or write) on $0102. And if there is no carry, the 6502 does not do that last cycle at all (it starts fetching the next insn instead), unless this is a write (because the first access, without the page # incremented, is done as a read -- doing a write to perhaps the wrong address isn't the smartest thing in the world). > With the indirect indexed addressing mode (zp),y it is similar. The dummy > read goes to the address stored in zp with the low byte increased by the > value of Y, but the high byte not yet incremented. Yeah, it's exactly the same for NNNN,x and NNNN,y and (NN),y . Segher Message was sent through the cbm-hackers mailing listReceived on 2016-05-10 02:00:02
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