Hello gentlemen, Raising this two year old thread from the dead as I have 3 broken 1551 paddles and Jim has offered to prototype a 6523T replacement. I've been doing some investigations into their operation and there were a few loose ends from the discussion that I thought were worth commenting on. 1) The core of the 6523T is indeed a 6525. Using a plus/4, all bits of all three ports can be set as outputs and will store a written 8-bit value. Additionally, the control registers R6 and R7 from a 6525 are present and can be read/written to at FEF6 and FEF7 (assuming set as device 8). Setting the mode control bit in R6 appears to affect the usage of port C as expected in the 6525 datasheet. The defined behaviour of the 6525 on /reset is to set mode control to 0 and neither FEF6 or FEF7 are accessed by the 264 series ROM, so I would see no reason to implement them. 2) If the paddle is inserted into the host but not connected to the drive, or the drive is powered off, the paddle registers are accessible at FEC0->FEC7, which is the default location if the 1551 is configured as drive 9. If the 1551 is configured as drive 9 and powered on, pin2 of the TCBM bus (DEY) is pulled low, which is connected to I8 of the PLA in the paddle, which generates the 6523T's /CS. 3) The 264 ROM's explicitly set all the data direction registers and the ports (when configured as outputs) on startup, but only if the drive is configured as device 8, as follows: FEF3 - FF ; DDR port A, all output. FEF4 - 00 ; DDR port B, all input (only P0 and P1 used) FEF5 - 40 ; DDR port C, P6 output, P7 input (others unused) FEF0 - 00 ; port A, all set low FEF2 - 40 ; port C, P6 high, P7 low (others unused) If set as drive 9, there is no attempt to initialise the registers at FEC0. It is possible that on reset, the drive keeps DEY high via pull-up in the 1551 long enough so that the registers are in the FEFx space long enough to be initialised. 4) There is no internal pull-ups in the 6523T. When left floating with the paddle disconnected from a 1551, all ports read 0 when set as input apart from portB-P1, which has a 2.2k pull-up on the paddle PCB. When connected to a powered on 1551, all lines have pull-ups on the 1551 main board. cheers, Rob On 09/03/2014 18:56, Jim Brain wrote: > On 3/9/2014 4:01 AM, smf wrote: >>> If set to input in the DDR they should read as '1' >> >> Only if there is a pull up resistor on the undefined bits, which there >> may or may not be. >> >> However it's only if the undefined values are actually somewhat >> reliable and are required by code that you have a major problem. The >> rom code can be analysed pretty easily without access to real hardware >> to see whether it's sensitive to the undefined inputs, if it's not >> then it's just accuracy for it's own sake (*). > Pragmatically, it would be helpful if the bits could be ignored > safely. Holding them in registers kicks the needed register count up > to 48 from 24, pushing one into more expensive options. > > Setting them to a specific value is possible (0 or 1), of course, at > no additional charge. > > Jim > > > Message was sent through the cbm-hackers mailing list Message was sent through the cbm-hackers mailing listReceived on 2016-04-05 23:00:03
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