Re: strange read with a 6502...

From: Gerrit Heitsch <gerrit_at_laosinh.s.bawue.de>
Date: Thu, 31 Mar 2016 21:45:17 +0200
Message-ID: <56FD7E4D.1040307@laosinh.s.bawue.de>
On 03/31/2016 09:35 PM, didier derny wrote:
> Finally it works at even and odd addresses
>
> I observed both case with the oscilloscope  ODD and EVEN addresses
>
> the differences between both case was  that when the code was at odd
> addresses
> the A0 line was at the same value for the next cycle,
> so the hypothesis was that CH376 was removing the data to fast when A0
> changed...
>
> so I added a small capacitor between A0 and GND  (on the CH376)
>
> now A0 is delayed and it works where ever is the code (odd/even)
>
> how  could I solve this problem properly ?
> I don't like this capacitor on the address bus...

You still didn't tell us if CS is low while PHI2 is high or not. Mixing 
this up would explain your problem...

  Gerrit




>
> thanks to all
>
> --
> didier
>
>
> On 30/03/2016 22:08, Gerrit Heitsch wrote:
>> On 03/30/2016 09:44 PM, didier derny wrote:
>>> if I remove the board and inject a signal on A0
>>> I get the signals on other pins   a few mv
>>> a little bit higher on CS
>>>
>>> I checked with the oscilloscope
>>>
>>> CS / PHI2  with the code odd/even seems ok   cs go low on falling edge
>>> of phi2  / go up on raising edge of phi2  (same for odd and even)
>>
>> Huh? According to what I could find, CS is low_active on that chip.
>> Meaning you need to have CS low when PHI2 is high.
>>
>>  Gerrit
>>
>>
>>
>>       Message was sent through the cbm-hackers mailing list
>
>
>        Message was sent through the cbm-hackers mailing list
>
>


       Message was sent through the cbm-hackers mailing list
Received on 2016-03-31 20:00:39

Archive generated by hypermail 2.2.0.