As previously noted, these use 5V XC9636 Xilinx CPLDs, no current limiting resistors or voltage shifters. The unit should be easily able to sink as much current as the C64 PLA. As noted, I tweaked the equations to create similar delays, but they could be further tweaked if needed. I don't have the problematic mobo version that needs the delay on the RAS or CAS line (have to go search for the number again), but for those who know what I am talking about, it'd be nice to test on that board version. Free to a few folks who are willing to abuse them. Email me off list with an address. If someone has a scope and wants to make some comparison plots, even better. Jim -- Jim Brain email@example.com www.jbrain.com Message was sent through the cbm-hackers mailing listReceived on 2015-07-19 06:00:07
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