Makes me wonder what it would take to put most of the 1541 logic onto a FPGA or CPLD... using SystemVerilog, for example. (And is my mentioning that considered a proof of my insanity? On Tue, Apr 22, 2014 at 12:14 PM, Gerrit Heitsch <firstname.lastname@example.org>wrote: > On 04/22/2014 06:49 PM, Ville Laustela wrote: > >> >> Hi. >> >> Thanks Spiro, that program sounds like a great idea. >> >> I made a test over ZoomFloppy (from WinVICE) and the drive 1 of the two >> drives. >> >> I typed in the program and run it and the first run gives "73,CBM DOS >> V2.6 1541,00,00" and the following runs give "00, OK,00,00". So it appears >> that the fault must lie at the DC VIA or the S.O bit on the 6502 (can I >> check this with a logic probe?). >> > > Well, the SO-Bit needs to change state when the drive is running and the > DOS has enabled that functionality through CA2 of the VIA that controls the > drive. It is supposed to indicate that a Byte is ready to be read. That > doesn't mean that the 6502 is reacting to it though, that part happens > inside the CPU where you cannot reach with a logic probe... > > You should grab the schematics for the 1541 long board. That one doesn't > have the gate array, it does everything in discrete TTL which makes it much > easier to find out HOW it's done. > > Gerrit > > > > > Message was sent through the cbm-hackers mailing list > Message was sent through the cbm-hackers mailing listReceived on 2014-04-22 18:01:46
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