> > http://www.smspower.org/uploads/Development/SegaMasterSystemIIServiceManual-1715922A-1.png%c2 > > > > the _RFSH is tied up to VCC.. > > I assume that if your access rate for the RAM is high enough (like when > using it for a framebuffer), you can forgo the internal refresh counter, > the refresh will happen as a byproduct of the normal read cycles (*). > > > (*) In a DRAM, any read cycle of any cell will cause a refresh cycle for > the whole row that cell is located in. Well, I understand that would explain why they could tie the _RFSH up to VCC for normal operations but it still does not explain why the note and the diagram both insist on some highly specific sequences on both _CE and _RFSH under penalty of the chip not working properly.. ? -- SD! Message was sent through the cbm-hackers mailing listReceived on 2014-03-11 12:00:04
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