Re: More CPLD explorations

Date: Tue, 25 Feb 2014 20:35:07 +0100
Message-ID: <etPan.530cf06b.515f007c.40ee@szaman.lan>
On 2014-02-25 at 19:08:03, Gerrit Heitsch ( wrote:

> > For now I’d be more concerned with the full compatibility of  
> the original setup. I tested (and use) the “realPLA” by skoe (yeah  
> - the same one) but I don’t have the KU board (which is said to be  
> most picky about what controls its chips) to test with.

> Can't speak about the KU, but I have two 250407 that will not play  
> 'Edge
> of Disgrace' with a SuperPLA. It will always hang at a certain  
> part of
> the demo. Use an original PLA and they work fine.
> On the other hand, the same SuperPLA works flawlessly in a 250466...  

realPLA is supposed to do better than SuperPLA. Maybe I can put the demo in question for a spin on a realPLA equipped 250407?

> On thing about the KU are the rather narrow traces. They didn't 
> use
> planes or wide traces for the +5V and GND.
> If you feel adventurous, use your Oscilloscope to visualize  
> what happens
> on a C64 board with GND. Hook up the GND part of the probe to GND at  
> the
> power supply intput and the other part to GND at the keyboard connector.  
> On a KU you will see peaks of up to 1V (peak to peak).

Now that’s a “WOW” .. ! I’d never expect such things on a professionally designed PCB. Really. That might mean that some chips are indeed swinging on the verges of usable voltage ranges, which may in fact explain the “pickyness” of this board to a degree.

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Received on 2014-02-25 20:01:46

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