Re: Three chip 6502 machine

From: Nate Lawson <>
Date: Wed, 12 Feb 2014 16:10:26 -0800
Message-Id: <>
Not to detract from it too much, but I wouldnt use a microcontroller to do address decoding. Id use a CPLD or similar logic device, allowing you to do higher speeds and multi-level logic that would take too many clock cycles in software. Of course, since the board is 6502-specific, a uC suffices and its a nice minimal design.

But then you start wondering why youre using a physical 6502 instead of a logic block in a FPGA, in which case, your glue logic then folds back into the same chip implementing the CPU.  :-)

I am interested in tracking the performance/cost tradeoff of uC, CPLD, FPGA, 32-bit CPUs (e.g., ARM) to know when to make these decisions. For a while, clock rate held uC devices back, and they werent even useful for single Mhz switching. But now theyve been ramping performance up quickly and they are better than an FPGA in low-power situations.


On Feb 12, 2014, at 1:46 PM, Justin <> wrote:

> Another clever hack, I wonder how well it can play the part of a 64.

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Received on 2014-02-13 01:00:07

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